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分享一篇CMOS斩波放大器文章
ABSTRACT
This paper describes the principle and design of a CMOS low-power, lowvoltage, chopped transconductance amplifier, for noise and offset reduction
in mixed analogue digital applications. The operation is based on chopping
and dynamic element matching, to reduce noise and offset, without
excessive increase of the charge injection residual offset. Experimental
results show residual offsets of less than 150μV at 100kHz chopping
frequency, a signal to noise ratio of 95dB, in audio band, for 100KHz
chopping and a THD of -89dB. The power consumption is 594μW
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