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[资料共享] Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and ...

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发表于 2017-12-12 12:39:01 | 显示全部楼层 |阅读模式

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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects   -- 自动模拟IC尺寸和优化约束与PVT角落和布局效果

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

本书向读者介绍了自动模拟集成电路(IC)尺寸和优化的各种工具。作者提供了一个关于解决自动模拟电路尺寸的早期方法的历史性观点,它的重点是尺寸和优化电路的方法以及估计电路性能的方法。本书的讨论还包括鲁棒的电路设计和优化以及布局感知模拟大小调整方法的最新进展。作者描述了模拟IC设计的自动流程的方法,包括输入和接口的细节,多目标优化技术以及通过使用机器倾斜技术在基本实现中所进行的增强。本书详细讨论了梯度模型,以及在电路尺寸上包括布局效应的方法。本书对所有模块的概念和算法进行了全面描述,使读者能够重现方法,提高设计质量,或将其用作新工具的起点。本书包含一系列广泛的应用示例来讲解所描述的方法的功能和特征。



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发表于 2018-6-27 10:28:14 | 显示全部楼层
好资料,学习一下,谢谢~~
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